New Connectivity
An etched circuit that shows the conductors and vias, which provide signal connections
The International Technology Roadmap for Semiconductors (ITRS) identifies five difficult challenges for interconnect between now and 2009:
- Introduction of new materials to meet conductivity requirements and reduce current leakage
- Manufacturable interconnect structures that are compatible with new materials and processes
- Achievement of necessary reliability
- Three-dimensional (3D) control of interconnect features to achieve circuit performance and reliability
- Manufacturability and defect management to meet cost/performance requirements
An important new approach in this field is 3D interconnect, in which chips are physically stacked and their circuits physically connected through microscopic avenues called "vias." Another advanced method is heterogeneous integration, which combines established interconnect schemes with advanced ones at selected places within a chip. These and other emerging interconnect technologies are being contemplated by engineers and scientists within the AMRC.
